Airframer
Quintus Technologies Quintus Technologies
NewsPress release

Press release

DDC-I announces safety-critical multi-core RTOS for NXP S32G network application processors

31/03/2026

Press releaseIssued by DDC-I, Inc..

DDC-I, a leading supplier of software and professional services for mission- and safety-critical applications, today announced the availability of its Deos multi-core real-time operating system for the NXP S32G family of network application processors with verification evidence to DO-178C Design Assurance Level A (DAL A). Deos support extends and strengthens the S32G’s applicability in safety and mission critical military and aerospace markets. Use cases include control nodes, data transfer devices, and intelligent sensors.

“The functionality, I/O and safety-critical requirements of automotive and industrial are aligning with military and aerospace, The S32G family is a good example, where Deos customers have selected it for applications such a safety critical flight controls” said Gary Gilliland, vice president of marketing at DDC-I. “Deos is especially well suited for S32G family use cases as so many of them involve highly deterministic real-time control and I/O processing.”

Deos uniquely offers both high performance single or multi-core processing with low jitter and deterministic system behavior. Additionally, the RTOS is loaded with features including time/space partitioning, cache partitioning, safe scheduling, networking, security, and data distribution that when combined with S32G hardware functions enable developers to create a safe and secure networking and control node.

The NXP S32G family of multi-core SoC network application processors feature up to eight 1.3-GHz Arm Cortex-A53 cores running Deos with cluster lockstep support, together with up to four 400-Mhz dual-core lockstep Arm Cortex-M7 real-time microcontrollers. All cores are equipped with up to 32 kbytes each of L1 instruction and data cache. In addition, each cluster of up to four A53 cores is equipped with 1 Mbyte of L2 cache. All A53 cores share up to 20 Mbytes of SRAM which can be segmented with Deos memory pools and cache partitioning to reduce worst case execution times and cache induced jitter. I/O and networking support include three 2.5-GBPS Ethernet channels with a packet forwarding engine, four lanes of PCIe, CAN FD, PCIe, FlexRay, LIN SPI, and GMAC. The S32G family also features integrated hardware security and meets ISO 26262 ASIL D safety requirements.

The industry ledger — an Analytics feature — collects the dated facts behind stories like this one, filterable by theme, company, program, country and date. See a worked example →

In this release

Sectors covered

People in this release

Gary GillilandVP Marketing · DDC-I, Inc.in

Where we hold a LinkedIn profile it’s marked — the links come with a subscription.

Your news here

Submit your press releases

Send releases and photographs to news@news.airframer.com — the pick of them reach Bulletin readers every Thursday.

Every Thursday

The Airframer Bulletin

The week’s aerospace manufacturing news, reported by our editors and delivered free to your inbox. Sign up ›

Go deeper

Who supplies whom?

Subscribers see the confirmed supply chain behind every story — complete supplier lists for each aircraft program, sector and company. See the plans ›

Spotted something wrong or out of date on this page? Tell us

Corrections go straight to the editorial team that maintains this directory.